1. Field of the Invention
The present invention relates to a semiconductor memory device, and, for example relates to a semiconductor memory device to which data is written by carrying a current between a source and a drain.
2. Related Art
In recent years, an FBC (Floating Body Cell) memory, an MRAM (Magnetic Random Access Memory), a PRAM (Phase Change Random Access Memory) and the like are known as memory devices expected to replace a DRAM (Dynamic Random Access Memory). As for the DRAM, no current is applied to memory cells when data is written to the memory cells. As for the FBC memory, the MRAM, and the PRAM, a current is applied to memory cells when data is written to the memory cells. For example, the FBC memory device includes FBCs each of which is constituted by an FET (Field Effect Transistor) that includes a floating body (hereinafter, also “body”) provided on an SOI (Silicon On Insulator). A current is applied to the body, whereby the FBC controls the number of majority carriers accumulated in each body and stores therein data “1” or data “0” according to the number of majority carriers.
In this way, the FBC consumes current when data is written to the FBC. In serial access such as burst mode access is made to a conventional FBC memory, sense amplifiers continue to apply write bias to FBCs based on latch data during the serial access. Due to this, the conventional FBC memory has a disadvantage of high current consumption.
To solve the disadvantage, there is known a method of connecting sense amplifiers only to bit lines in a selected column during a data writing operation, and applying a current only to selected memory cells connected to the bit lines. If this method is used, it is necessary to provide an additional circuit in each of the sense amplifiers for connecting only the selected bit lines to the respective sense amplifiers, with the result that each sense amplifier is made large in circuit scale.